Research

Researching the Systems Behind the Next Generation of Computing.

My research interests sit at the intersection of digital hardware, sustainable computing, physics, mathematics, and emerging computing architectures. I am especially interested in how specialized hardware can perform meaningful computation while reducing unnecessary energy use and system overhead.

Research Experience

Quantum Computing Research Assistant

Altivatum

Conducting and supporting research involving quantum computing concepts, emerging computational systems, and the relationship between advanced computing architectures and real-world technical applications.

A’Yana Leonard is a U.S. Army veteran, FPGA and digital systems designer, and quantum computing research assistant with Altivatum. Her work explores sustainable computing, energy-aware hardware, parallel processing, AI acceleration, and emerging computing technologies. With an interdisciplinary background in technology, research, physics, mathematics, and business, she approaches engineering from both a technical and real-world problem-solving perspective.

Professional portrait of A’Yana Leonard — A’Yana Leonard
FPGA & Digital Systems Designer • Quantum Computing Research Assistant

Research Focus

Areas I actively explore.

Quantum Computing

FPGA Architecture

Energy-Aware Hardware

Sustainable Data Processing

Parallel Computing

AI Hardware Acceleration

Digital System Verification

Emerging Computing Systems

Case Studies

From research question to engineered result.

GreenChip

Sustainable Hardware Research

Research question: Can an embedded FPGA system meaningfully monitor and manage its own energy use without adding significant computational overhead?
Engineering approach: Designed on-chip activity and energy monitors alongside temperature sensing and PWM-based thermal control, coordinated by a hardware power-management block and exposed over UART and SPI.
Technologies used: SystemVerilog, AMD Vivado 2026.1, AMD Artix-7, UART, SPI, PWM, modular verification testbenches.
Current result: Completed a full implementation flow — simulation, verification, synthesis, placement, routing, timing analysis, and bitstream generation.
Future research direction: Extending the monitoring framework toward adaptive, workload-aware power policies and richer environmental telemetry.

GreenMatrix

FPGA-Based AI Acceleration Research

Research question: How can the multiply-accumulate operation central to AI workloads be structured on an FPGA to remain both efficient and scalable?
Engineering approach: Built a parameterized systolic array of reusable processing elements with a matrix loader, output buffer, and controller FSM so the same design can scale to larger arrays.
Technologies used: SystemVerilog, parameterized systolic array, multiply-accumulate units, AMD Vivado, Icarus Verilog.
Current result: The 2×2 implementation achieved timing closure on an Artix-7 target with zero failing setup or hold endpoints.
Future research direction: Scaling the array to larger dimensions and characterizing throughput and energy trade-offs across configurations.

YanaGPU

Parallel Computing & Processor Architecture Research

Research question: What does a minimal, verifiable vector-compute processor look like when it must fit within the physical I/O limits of a real FPGA?
Engineering approach: Developed a four-lane SIMD engine with an eight-entry vector register file and encoded operation control, validated by a self-checking testbench, then reworked the data interface to fit the device.
Technologies used: SystemVerilog, four-lane SIMD, 64-bit vector registers, self-checking testbench, AMD Vivado, AMD Artix-7.
Current result: Implemented on an Artix-7 target after reducing physical I/O usage from 133 exposed ports to 50.
Future research direction: Exploring wider SIMD lanes, deeper register files, and instruction encoding for a broader operation set.

Exploring a research question?

Whether it’s sustainable hardware, AI acceleration, or emerging computing systems, I’d welcome a conversation about it.

Let’s Connect